SHEETAL KAUL. STRATEGIES FOR REDUCING POWER CONSUMPTION DURING IC TESTING: POWER-AWARE DFT IN PRACTICE. IPHO-Journal of Advance Research in Science And Engineering , [S. l.], v. 4, n. 1, p. 23–31, 2026. DOI: 10.5281/zenodo.19354854. Disponível em: https://www.iphopen.org/index.php/se/article/view/425. Acesso em: 30 jun. 2026.